{"created":"2023-06-19T11:37:38.838636+00:00","id":5035,"links":{},"metadata":{"_buckets":{"deposit":"a9c0cd2d-e925-4751-b9b8-b1f079cc06d8"},"_deposit":{"created_by":13,"id":"5035","owners":[13],"pid":{"revision_id":0,"type":"depid","value":"5035"},"status":"published"},"_oai":{"id":"oai:mie-u.repo.nii.ac.jp:00005035","sets":["366:367:368:391"]},"author_link":["10833","10834","10835"],"item_4_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"1998-12-25","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"28","bibliographicPageStart":"23","bibliographicVolumeNumber":"23","bibliographic_titles":[{"bibliographic_title":"Research reports of the Faculty of Engineering, Mie University"}]}]},"item_4_description_14":{"attribute_name":"フォーマット","attribute_value_mlt":[{"subitem_description":"application/pdf","subitem_description_type":"Other"}]},"item_4_description_4":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"This paper presents a new method for sequential testability based on clock controlling. First, we define the concept \"initialization complexity\" which measure the difficulty of initializing states of flip-flops. Next, we propose new criteria for determining clock control groups based on this concept. Finally, we show the effectiveness of our method in the viewpoint of fault detection with experimental results for benchmark circuits.","subitem_description_type":"Abstract"}]},"item_4_publisher_30":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Faculty of Engineering, Mie University"}]},"item_4_source_id_7":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0385-6208","subitem_source_identifier_type":"PISSN"}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA00816341","subitem_source_identifier_type":"NCID"}]},"item_4_text_18":{"attribute_name":"その他のタイトル","attribute_value_mlt":[{"subitem_text_language":"ja","subitem_text_value":"初期化複雑度を用いたテスト容易化のためのクロック分割法"}]},"item_4_text_65":{"attribute_name":"資源タイプ（三重大）","attribute_value_mlt":[{"subitem_text_value":"Departmental Bulletin Paper / 紀要論文"}]},"item_4_version_type_15":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Takase, Haruhiko","creatorNameLang":"en"},{"creatorName":"高瀬, 治彦","creatorNameLang":"ja"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hayashi, Terumine","creatorNameLang":"en"},{"creatorName":"林, 照峯","creatorNameLang":"ja"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shinogi, Tsuyoshi","creatorNameLang":"en"},{"creatorName":"篠木, 剛","creatorNameLang":"ja"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2017-02-18"}],"displaytype":"detail","filename":"AA008163410230005.PDF","filesize":[{"value":"328.5 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"AA008163410230005.PDF","url":"https://mie-u.repo.nii.ac.jp/record/5035/files/AA008163410230005.PDF"},"version_id":"29c288d7-aa20-49c8-97d7-521adba584d5"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"Sequential circuit","subitem_subject_scheme":"Other"},{"subitem_subject":"Design for testability","subitem_subject_scheme":"Other"},{"subitem_subject":"Fault detectability","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"departmental bulletin paper","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"A Clock Partitioning Method Using Initialization Complexity for Sequential Testability","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"A Clock Partitioning Method Using Initialization Complexity for Sequential Testability","subitem_title_language":"en"}]},"item_type_id":"4","owner":"13","path":["391"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2007-07-02"},"publish_date":"2007-07-02","publish_status":"0","recid":"5035","relation_version_is_last":true,"title":["A Clock Partitioning Method Using Initialization Complexity for Sequential Testability"],"weko_creator_id":"13","weko_shared_id":-1},"updated":"2023-10-05T07:07:28.941532+00:00"}